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Samsung Delays 1.4nm to 2029

Samsung Delays 1.4nm to 2029
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๐Ÿ’กSamsung's delayed 1.4nm roadmap could reshape timelines and sourcing for future AI accelerators.

โšก 30-Second TL;DR

What Changed

Samsung Foundry's 1.4nm-class node is now targeted for 2029

Why It Matters

The revised schedule signals a slower transition to sub-2nm manufacturing and may affect future AI accelerator supply planning. High-NA EUV adoption could eventually improve the economics and scalability of 1nm-class chips.

What To Do Next

Update your AI hardware roadmap to model Samsung's 2029 1.4nm availability and evaluate alternative foundries for nearer-term accelerator designs.

Who should care:Enterprise & Security Teams

Key Points

  • โ€ขSamsung Foundry's 1.4nm-class node is now targeted for 2029
  • โ€ขSF2 is expected to remain in production for an unusually long period
  • โ€ขHigh-NA EUV is planned for 1nm-class nodes starting in 2030

๐Ÿง  Deep Insight

AI-generated analysis for this event.

๐Ÿ”‘ Enhanced Key Takeaways

  • โ€ขSamsung's strategic pivot reflects a broader industry trend of prioritizing yield optimization and cost-efficiency in advanced nodes over aggressive, high-risk scaling timelines.
  • โ€ขThe delay is reportedly linked to challenges in achieving competitive power, performance, and area (PPA) metrics for the 1.4nm node compared to existing SF2 iterations.
  • โ€ขSamsung is shifting focus toward 'SF2P' (2nm performance-enhanced) and 'SF2Z' (backside power delivery) variants to bridge the gap until 1nm-class production.
  • โ€ขThe adoption of High-NA EUV lithography is now explicitly tied to the 1nm-class node, marking a departure from earlier industry speculation that Samsung might integrate it sooner.
  • โ€ขThis roadmap adjustment aligns with Samsung's efforts to stabilize its foundry business unit, which has faced significant pressure from TSMC's dominance in the high-end AI chip market.
๐Ÿ“Š Competitor Analysisโ–ธ Show
FeatureSamsung FoundryTSMCIntel Foundry
Advanced Node StrategyFocus on SF2/SF2P/SF2Z longevityRapid transition to N2/N2P/A16Aggressive 18A and 14A adoption
High-NA EUV StatusTargeted for 1nm-class (2030+)Pilot/Production integration (A16/A14)Early adopter (High-NA tools installed)
Backside Power DeliverySF2Z (Planned)N2P (Planned)PowerVia (Implemented)

๐Ÿ› ๏ธ Technical Deep Dive

  • SF2 (2nm): Utilizes Multi-Bridge-Channel FET (MBCFET) architecture, Samsung's proprietary implementation of Gate-All-Around (GAA) transistors.
  • SF2Z: Incorporates Backside Power Delivery Network (BSPDN) to reduce IR drop and improve power efficiency by separating power and signal routing.
  • High-NA EUV: Refers to lithography machines with a numerical aperture of 0.55, enabling higher resolution patterning required for sub-2nm features without multi-patterning.
  • 1nm-class nodes: Expected to leverage further refinements in nanosheet scaling and potentially transition to new channel materials or advanced 3D stacking techniques.

๐Ÿ”ฎ Future ImplicationsAI analysis grounded in cited sources

Samsung will lose significant market share in the AI accelerator segment through 2028.
The delay of the 1.4nm node leaves a performance gap that competitors utilizing 2nm and 1.6nm processes will likely exploit for high-performance computing contracts.
Capital expenditure on High-NA EUV infrastructure will be deferred until 2028-2029.
By pushing the 1nm-class node to 2030, Samsung has reduced the immediate urgency to deploy expensive High-NA EUV scanners in its current fab expansion plans.

โณ Timeline

2022-06
Samsung begins mass production of 3nm GAA process technology.
2023-06
Samsung Foundry Forum announces roadmap including 1.4nm target for 2027.
2024-07
Samsung updates foundry roadmap, emphasizing SF2 and variants like SF2P.
2025-11
Samsung reports yield improvements in 3nm and 2nm GAA development cycles.
๐Ÿ“ฐ

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