๐ญ๐ฐSCMP TechnologyโขRecentcollected in 1m
China Advances Photonic Chips to Bypass US AI Curbs

๐กDiscover how China is leveraging photonics to potentially circumvent US AI hardware export controls.
โก 30-Second TL;DR
What Changed
China opened a dedicated optical computing laboratory in Shanghai.
Why It Matters
If successful, this could significantly reduce China's reliance on Western-controlled silicon supply chains for AI model training.
What To Do Next
Monitor the performance benchmarks of emerging optical computing architectures to assess their viability for future AI inference workloads.
Who should care:Researchers & Academics
๐ง Deep Insight
AI-generated analysis for this event.
๐ Enhanced Key Takeaways
- โขThe Shanghai laboratory is specifically focused on integrating photonic computing with existing CMOS manufacturing processes to lower the barrier for mass production.
- โขPhotonic chips demonstrate significantly lower power consumption compared to traditional GPUs, with research indicating potential for 10x to 100x improvements in energy efficiency for specific AI inference tasks.
- โขKey Chinese research institutions, including Tsinghua University and the Chinese Academy of Sciences, are collaborating on the 'Taichi' architecture, a photonic computing framework designed to handle large-scale neural network operations.
- โขThe initiative is part of a broader 'New Quality Productive Forces' strategy, which prioritizes self-reliance in semiconductor sub-sectors where China faces the most severe export controls.
- โขEarly benchmarks suggest that photonic AI accelerators can achieve ultra-low latency in matrix multiplication, a core operation in Large Language Model (LLM) processing, by utilizing wavelength-division multiplexing.
๐ Competitor Analysisโธ Show
| Feature | Photonic Chips (China) | NVIDIA H100/B200 | Lightmatter (US) | Ayar Labs (US) |
|---|---|---|---|---|
| Primary Medium | Photons | Electrons | Photons | Photons |
| Energy Efficiency | Ultra-High | Moderate | High | High |
| Manufacturing | CMOS-Compatible | Advanced Silicon | CMOS-Compatible | CMOS-Compatible |
| Market Focus | Domestic Sovereignty | Global AI Training | Commercial AI/HPC | Data Center Interconnect |
๐ ๏ธ Technical Deep Dive
- Architecture: Utilizes Mach-Zehnder Interferometers (MZIs) to perform high-speed matrix-vector multiplication in the optical domain.
- Data Processing: Employs wavelength-division multiplexing (WDM) to process multiple data streams simultaneously on a single optical waveguide.
- Integration: Leverages silicon-on-insulator (SOI) platforms to enable monolithic integration of optical components with electronic control circuits.
- Latency: Achieves sub-nanosecond processing speeds for linear algebraic operations, bypassing the von Neumann bottleneck inherent in electronic architectures.
- Scalability: Current prototypes utilize diffractive deep neural network (D2NN) designs to scale parameter counts without proportional increases in power draw.
๐ฎ Future ImplicationsAI analysis grounded in cited sources
Photonic chips will achieve parity with 7nm electronic GPUs for specific AI inference tasks by 2028.
The rapid maturation of optical interconnects and MZI-based computing architectures is significantly reducing the performance gap in specialized matrix operations.
China will reduce its reliance on high-end NVIDIA imports for inference-heavy data centers by 20% within three years.
The deployment of domestic photonic accelerators provides a viable, non-restricted alternative for the massive inference workloads required by Chinese LLM developers.
โณ Timeline
2023-07
Tsinghua University researchers publish 'Taichi' photonic computing architecture in Science.
2024-04
Breakthrough in on-chip optical computing efficiency reported, demonstrating 1,000x speedup in specific AI tasks.
2025-11
Shanghai municipal government announces funding for a dedicated optical computing industrial park.
2026-03
Official inauguration of the top-level optical computing laboratory in Shanghai.
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Original source: SCMP Technology โ