TSMC Targets High-NA EUV for 2030

💡TSMC’s EUV roadmap could shape the process nodes available for next-generation AI accelerators.
⚡ 30-Second TL;DR
What Changed
TSMC has disclosed a target to adopt High-NA EUV lithography in 2030.
Why It Matters
High-NA EUV could enable more advanced and densely packed chips for future AI accelerators, although the timeline remains several years away. TSMC’s roadmap may influence accelerator designers’ expectations for future process-node availability and manufacturing costs.
What To Do Next
Add TSMC’s 2030–2033 High-NA EUV milestones to your AI accelerator manufacturing and process-node roadmap.
Key Points
- •TSMC has disclosed a target to adopt High-NA EUV lithography in 2030.
- •A10 and A11 process technologies are the leading candidates for initial deployment.
- •New scanners supporting 6×12-inch photomasks are planned for 2033.
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Original source: Tom's Hardware ↗
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