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Samsung Delays High-NA EUV Until 2030
#semiconductor#advanced-node#chip-manufacturingsamsung-foundry-high-na-euv-roadmapsamsungsamsung-foundryasmlhigh-na-euv
💡Samsung may delay the lithography leap that shapes future AI chip supply, cost, and performance.
⚡ 30-Second TL;DR
What Changed
Samsung Foundry is delaying a firm commitment to ASML High-NA EUV equipment.
Why It Matters
For AI companies, advanced-node foundry roadmaps influence the future availability, performance, and cost of AI accelerators. A later High-NA EUV transition could affect Samsung’s competitiveness in supplying leading-edge AI chips.
What To Do Next
Review your AI accelerator supply plan against Samsung Foundry’s 1nm and ASML High-NA EUV timeline, and identify alternative foundries for leading-edge capacity.
Who should care:Enterprise & Security Teams
Key Points
- •Samsung Foundry is delaying a firm commitment to ASML High-NA EUV equipment.
- •The technology is reportedly planned for Samsung’s 1nm process development around 2030.
- •Samsung could become one of the last leading chipmakers to adopt High-NA EUV.
- •The decision may affect the timing and competitiveness of future advanced-node manufacturing.
🧠 Deep Insight
AI-generated analysis for this event.
🔑 Enhanced Key Takeaways
- •Samsung's hesitation is largely attributed to the extremely high cost of ASML's High-NA EUV machines, which are estimated to exceed $350 million per unit.
- •The company is currently prioritizing the optimization of its existing Low-NA EUV infrastructure and Gate-All-Around (GAA) transistor architecture to maximize yield before transitioning.
- •Industry analysts suggest Samsung is exploring 'multi-patterning' techniques with current Low-NA EUV tools to delay the capital expenditure required for High-NA systems.
- •Samsung's foundry division has faced significant yield challenges at advanced nodes (3nm and below), which has influenced a more conservative capital investment strategy.
- •ASML has publicly acknowledged that different chipmakers have varying timelines for High-NA adoption based on their specific product roadmaps and economic considerations.
📊 Competitor Analysis▸ Show
| Feature | Samsung Foundry | TSMC | Intel Foundry |
|---|---|---|---|
| High-NA EUV Strategy | Delayed (Targeting 2030) | Selective/Phased Adoption | Early Adopter (In-house) |
| Primary Node Focus | GAA (3nm/2nm) | FinFET/Nanosheet (2nm) | RibbonFET (18A/14A) |
| Current EUV Tech | Low-NA (0.33) | Low-NA (0.33) | High-NA (0.55) |
🛠️ Technical Deep Dive
- High-NA EUV (High Numerical Aperture Extreme Ultraviolet) lithography utilizes a 0.55 NA lens compared to the 0.33 NA of standard EUV systems.
- The increased NA allows for higher resolution patterning, enabling smaller feature sizes without the need for complex multi-patterning steps.
- High-NA systems require a larger anamorphic lens design, which necessitates a change in mask size and reticle field dimensions compared to traditional EUV.
- The transition to High-NA involves significant changes to photoresist chemistry and pellicle technology to handle the increased energy density and throughput requirements.
🔮 Future ImplicationsAI analysis grounded in cited sources
Samsung's market share in the sub-2nm foundry segment will face downward pressure.
Competitors utilizing High-NA EUV earlier may achieve better power, performance, and area (PPA) metrics, making them more attractive to high-end fabless customers.
Samsung will increase reliance on multi-patterning for its 2nm and 1.4nm nodes.
Without High-NA equipment, Samsung must use multiple exposures with existing Low-NA tools to achieve the required resolution, increasing manufacturing complexity and cost.
⏳ Timeline
2022-06
Samsung begins mass production of 3nm GAA process nodes.
2023-12
ASML delivers the first High-NA EUV scanner (EXE:5000) to Intel.
2024-05
Samsung announces adjustments to its foundry roadmap, emphasizing yield stabilization.
2025-09
Samsung reports progress on 2nm GAA process development without High-NA integration.
📰
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