🗾ITmedia AI+ (日本)•Freshcollected in 82m
Rapidus Bets on 2nm Without Fighting TSMC
💡Rapidus is challenging the 2nm race with flexible production instead of TSMC-scale volume.
⚡ 30-Second TL;DR
What Changed
Rapidus is targeting mass production of 2nm semiconductors as a roughly 7 trillion yen national project.
Why It Matters
If successful, Rapidus could create an alternative manufacturing model for customers that value customization and speed over massive wafer volumes. Its strategy also highlights how national semiconductor programs are attempting to reshape advanced-chip supply chains.
What To Do Next
Map your AI hardware roadmap against Rapidus’s proposed 2nm and RUMS model to assess whether customized domestic supply could fit future accelerator designs.
Who should care:Founders & Product Leaders
Key Points
- •Rapidus is targeting mass production of 2nm semiconductors as a roughly 7 trillion yen national project.
- •The company intends to avoid a direct scale competition with TSMC.
- •RUMS integrates design-related and front-end/back-end manufacturing processes in one facility for diversified production.
- •Rapidus began with a core group of only 14 people and aims to develop Hokkaido into a semiconductor hub.
🧠 Deep Insight
Background and context from public sources — not the original article. 25 sources cited.
🔑 Enhanced Key Takeaways
- •Rapidus was established in August 2022 by a consortium of eight major Japanese companies, including Toyota, Sony, SoftBank, and NEC, with an initial investment of 7.3 billion yen.
- •The company has formed strategic partnerships with IBM for 2nm technology development, including chiplet packaging, and with Belgium-based IMEC for advanced semiconductor research.
- •Rapidus's 2nm process utilizes Gate-All-Around (GAA) transistor architecture, which offers improved electrostatic control and enables higher transistor density compared to older FinFET designs.
- •The Innovative Integration for Manufacturing (IIM-1) foundry in Chitose, Hokkaido, began pilot line operations in April 2025 and installed Japan's first mass-production-grade ASML EUV lithography system in December 2024.
- •Rapidus aims to price its 2nm-class wafers at approximately $18,500 to $21,500, which is reportedly lower than TSMC's rumored N2 wafer price of around $30,000.
📊 Competitor Analysis▸ Show
| Feature/Company | Rapidus (2nm) | TSMC (N2) | Samsung (SF2) | Intel (18A) |
|---|---|---|---|---|
| Business Model | RUMS (Rapid & Unified Manufacturing Service): Integrated design, front-end, and back-end processes for diversified, lower-volume, custom chips. | Pure-play foundry, high-volume manufacturing. | Pure-play foundry, high-volume manufacturing. | IDM and foundry services. |
| Target Market | Specialized, lower-volume, rapid-turnaround chips (e.g., AI, autonomous systems, defense). | Broad market, high-volume logic. | Broad market, high-volume logic. | Broad market, high-volume logic. |
| Wafer Pricing (Estimated) | ~$18,500 - $21,500 | ~$30,000 | ~$20,000 | Not publicly disclosed for foundry services. |
| Mass Production Target | H2 2027 | HVM entered late 2025 | HVM for 2nm in 2025, 1.4nm pushed to 2029. | Already started production. |
| Key Technology | Gate-All-Around (GAA) nanosheet transistors. | Gate-All-Around (GAA) nanosheet transistors. | Gate-All-Around (GAA) nanosheet transistors. | RibbonFET (GAA) transistors. |
🛠️ Technical Deep Dive
- 2nm Process Technology: Rapidus's 2nm node is based on IBM's technology, utilizing Gate-All-Around (GAA) nanosheet transistors. This architecture provides superior electrostatic control and enables higher transistor density, offering significant performance gains (45% better performance or 75% power savings compared to 7nm chips) and improved energy efficiency.
- RUMS (Rapid and Unified Manufacturing Service): This is Rapidus's proprietary integrated business model that encompasses chip design support, front-end wafer processing, and back-end packaging within a single facility. The goal is to achieve the world's fastest cycle times for custom chips and chiplets.
- Single-Wafer Processing: The Innovative Integration for Manufacturing (IIM-1) foundry is optimized for single-wafer processes across all manufacturing equipment. This method facilitates the collection of detailed data during processing, enabling real-time AI-based control and feedback to accelerate process optimization and yield learning.
- AI-Assisted Design Solutions (Raads): Rapidus has developed Raads, an AI-driven system operations platform that leverages machine learning models to enhance chip design efficiency and accuracy. It integrates AI and sensors in the wafer process to optimize design and manufacturing, supporting concepts like "Manufacturing for Design" (MFD) and "Design-Manufacturing Co-Optimization" (DMCO).
- EUV Lithography: Rapidus installed Japan's first mass-production-grade ASML TWINSCAN NXE:3800E EUV lithography system in December 2024. This advanced lithography process, using a 13.5nm wavelength, is critical for forming the 2nm generation GAA structure.
- Chiplet Packaging Technology: Rapidus and IBM are jointly developing mass production technologies for chiplet packages for 2nm-generation semiconductors, aiming to further innovate in advanced packaging.
🔮 Future ImplicationsAI analysis grounded in cited sources
Rapidus's success could significantly enhance Japan's economic security and global semiconductor supply chain resilience.
By establishing domestic advanced chip manufacturing, Japan aims to reduce its reliance on a concentrated global supply chain, particularly from Taiwan, which is vulnerable to geopolitical tensions and disruptions.
The RUMS model could establish a new niche in the advanced semiconductor foundry market, catering to specialized, lower-volume, and rapid-turnaround chip demands.
Rapidus's integrated approach and focus on faster cycle times for custom chips and chiplets differentiate it from traditional high-volume foundries, potentially attracting customers with specific needs for AI, autonomous systems, and defense applications.
Rapidus faces substantial challenges in achieving its mass production and profitability targets due to intense competition and the difficulty of achieving competitive yields.
While Rapidus has secured significant funding and made technological progress, it is chasing a moving target with established leaders like TSMC and Samsung already in or ahead of 2nm production, and it still needs committed high-volume customers to fill its capacity.
⏳ Timeline
2022-08
Rapidus Corporation established by eight major Japanese companies.
2022-12
Rapidus announced a joint development partnership with IBM Research for 2nm technology.
2023-09
Groundbreaking ceremony for Rapidus's IIM-1 factory in Chitose, Hokkaido.
2024-12
Japan's first mass-production-grade ASML EUV lithography system installed at IIM-1.
2025-04
Pilot line operations commenced at the IIM-1 foundry in Chitose, Hokkaido.
2025-07
Rapidus achieved the first successful operation of 2nm Gate-All-Around (GAA) transistors at IIM-1.
📎 Sources (25)
Factual claims are grounded in the sources below. Forward-looking analysis is AI-generated interpretation.
- rapidus.inc
- wikipedia.org
- mosgyan.com
- ibm.com
- forbes.com
- csis.org
- rapidus.inc
- tomshardware.com
- ibm.com
- rapidus.inc
- startupfortune.com
- eeworld.com.cn
- rapidus.inc
- rapidus.inc
- tomshardware.com
- rapidus.inc
- rapidus.inc
- tomshardware.com
- eurasiareview.com
- trendforce.com
- substack.com
- prnewswire.com
- japan-forward.com
- stanford.edu
- japantimes.co.jp
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