⚛️量子位•Stalecollected in 2h
Chinese Team Redefines Computing: Analog Matrices, Digital Logic
💡A new chip architecture claims to perform matrix math in one step, potentially outperforming Nvidia's current GPUs.
⚡ 30-Second TL;DR
What Changed
Hybrid architecture combining analog matrix processing with digital logic
Why It Matters
If scalable, this architecture could drastically lower the energy consumption and latency for large-scale matrix multiplications in deep learning.
What To Do Next
Monitor the research paper for this chip's power-efficiency benchmarks to evaluate its potential for future edge AI deployment.
Who should care:Researchers & Academics
Key Points
- •Hybrid architecture combining analog matrix processing with digital logic
- •Significant reduction in computational steps compared to traditional GPUs
- •Potential to disrupt high-latency AI inference workloads
🧠 Deep Insight
Web-grounded analysis with 23 cited sources.
🔑 Enhanced Key Takeaways
- •A Chinese research team from Peking University has achieved 24-bit fixed-point precision in analog computation using resistive random-access memory (RRAM) in a crossbar architecture, a level of accuracy previously considered unattainable for analog systems, making it comparable to digital processors for complex AI tasks.
- •Another Chinese team from Nanjing University developed an analog in-memory computing chip that ensures high precision by encoding analog computing weights through highly stable device geometry ratios, rather than relying on unstable physical parameters like device resistance. This design demonstrated robust performance across extreme temperatures (-78.5 °C to 180 °C) and strong magnetic fields.
- •Tsinghua University's All-Analogue Chip Combining Electronics and Light (ACCEL) innovatively fuses photonic and analog electronic computing, enabling it to achieve a processing speed 3,000 times faster than Nvidia's A100 GPU and consume 4 million times less energy for tasks such as image recognition and autonomous driving, despite being built with a 20-year-old transistor fabrication process.
- •The hybrid architecture leverages 'compute-in-memory' principles, where calculations occur directly within memory arrays by storing weights as conductance values (e.g., in RRAM or phase-change memory). This approach effectively bypasses the Von Neumann bottleneck, significantly reducing data movement, latency, and power consumption inherent in traditional digital architectures.
📊 Competitor Analysis▸ Show
| Feature / Competitor | Chinese Team (Peking/Tsinghua) | IBM Research Analog AI Chip | Mythic M1076 AMP | Nvidia H100 (Digital GPU) |
|---|---|---|---|---|
| Architecture | Hybrid Analog-Digital (RRAM-based / Photonic-Electronic Fusion) | Mixed-signal Analog In-Memory Compute (Phase-Change Memory) | Analog In-Memory Compute (AMP tiles) | Digital GPU (Tensor Cores) |
| Precision | 24-bit fixed-point (Peking), comparable to digital | 92.81% accuracy on CIFAR-10 | INT4, INT8 support | High (e.g., FP32, FP16, INT8) |
| Peak Performance | Up to 4.6 PFLOPS (Tsinghua ACCEL), 1000-3000x faster than Nvidia A100/H100 for specific tasks | 63.1 TOPs throughput | Up to 25 TOPS (single chip) | Hundreds to thousands of TOPS (e.g., H100: 4000 TOPS FP8) |
| Energy Efficiency | 100-4 million times better than Nvidia A100/H100 for specific tasks | Up to 9.76 TOPs/W | Up to 1/10th the power of desktop GPU (25 TOPS at ~3W) | High power consumption (hundreds of watts) |
| Memory | RRAM-based crossbar architecture (Peking), Compute-in-Memory | 64 analog in-memory compute cores (Phase-Change Memory) | On-chip DNN model execution, no external DRAM (up to 80M weights) | External DRAM (HBM) |
| Fabrication Process | Standard CMOS (Nanjing), 20-year-old transistor process (Tsinghua) | IBM's Albany NanoTech Complex | Not specified, but aims for low cost | Advanced lithography |
| Primary Application | AI inference, matrix equation solving, wireless communications, image recognition, autonomous driving | DNN inference tasks, computer vision | High-end edge AI applications | General-purpose AI training and inference, data centers |
🛠️ Technical Deep Dive
- Peking University's RRAM-based chip: Utilizes resistive random-access memory (RRAM) in a crossbar architecture to directly solve matrix equations through electrical operations. It achieves 24-bit fixed-point precision by overcoming historical limitations of noise, drift, and interference through the synergistic integration of new materials, novel circuits, and advanced algorithms.
- Nanjing University's analog in-memory computing chip: Fabricated using standard CMOS processes, this chip encodes analog computing weights via highly stable device geometry ratios, rather than relying on unstable physical parameters like device resistance. It integrates weight remapping technology to achieve a record-setting root-mean-square error (RMSE) of 0.101% in parallel vector–matrix multiplication.
- Tsinghua University's ACCEL chip: Features a computing framework that fuses photonic and analog electronic computing. It uses light signals to perform a significant portion of its operations, which greatly increases energy efficiency and computing speed.
- Hybrid Analog-Digital Interface: In these hybrid architectures, Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) are typically integrated to seamlessly bridge the analog matrix processing with digital logic and memory components, allowing for the benefits of both domains.
- Compute-in-Memory (CIM): A core principle is the storage of synaptic weights as conductance values within memory arrays (e.g., RRAM, phase-change memory). This enables matrix multiplications to be performed directly in memory by leveraging physical current flow, thereby eliminating the energy-intensive and time-consuming data movement between separate processing and memory units, which is a major bottleneck in traditional Von Neumann architectures.
🔮 Future ImplicationsAI analysis grounded in cited sources
Analog-digital hybrid chips will become a dominant architecture for edge AI and specialized inference tasks.
Their superior energy efficiency and speed for matrix operations make them ideal for power-constrained devices and real-time AI applications where high precision is not always paramount.
The development of high-precision analog computing could significantly reduce the energy footprint of large-scale AI models.
By performing matrix operations with hundreds to thousands of times better energy efficiency than digital GPUs, these chips can drastically cut power consumption for AI training and inference, addressing a critical sustainability challenge.
China could gain a strategic advantage in AI hardware by leading in analog semiconductor manufacturing.
Analog AI requires different manufacturing processes than digital chips, and China's investments in analog semiconductor facilities could allow it to bypass traditional digital bottlenecks and reshape the global semiconductor power structure.
⏳ Timeline
1622
William Oughtred invents the slide rule, an early form of analog computer.
1931
Vannevar Bush builds the differential analyzer at MIT, a mechanical analog computer capable of solving differential equations.
2023-08
IBM Research publishes a paper in Nature Electronics on its mixed-signal analog AI chip, featuring 64 analog in-memory compute cores.
2025-05
EnCharge announces the EN100, an AI accelerator built on precise and scalable analog in-memory computing.
2025-10
Peking University team publishes a groundbreaking paper in Nature Electronics on a high-precision, scalable analog matrix computing chip based on RRAM.
2025-10
Nanjing University team proposes a high-precision analog computing architecture using stable device geometry ratios for analog in-memory computing.
2026-01
Peking University team's analog chip demonstrates real-world application performance for tasks like recommendation systems and image processing, showing a 12-fold speed increase and 200 times better energy efficiency.
2026-03
Tsinghua University's All-Analogue Chip Combining Electronics and Light (ACCEL), which fuses photonic and analog electronic computing, is reported.
📎 Sources (23)
Factual claims are grounded in the sources below. Forward-looking analysis is AI-generated interpretation.
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