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Automakers Shift to In-House Autonomous Driving Chip Development

Automakers Shift to In-House Autonomous Driving Chip Development
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๐ŸผRead original on Pandaily

๐Ÿ’กMajor automakers are moving to custom silicon, signaling a massive shift in the AI edge computing supply chain.

โšก 30-Second TL;DR

What Changed

Five major automakers are now building proprietary silicon for autonomous driving.

Why It Matters

This shift threatens the market share of established chip vendors and forces a vertical integration trend in the automotive industry. It signals a move toward hardware-software co-design to optimize AI model inference on edge devices.

What To Do Next

Analyze the hardware-software integration requirements for your edge AI projects to determine if custom silicon or specialized accelerators are necessary for your performance targets.

Who should care:Developers & AI Engineers

Key Points

  • โ€ขFive major automakers are now building proprietary silicon for autonomous driving.
  • โ€ขIn-house development aims to challenge the dominance of traditional third-party chip suppliers.
  • โ€ขCompanies claim their custom chips meet or exceed the performance of commercially available solutions.

๐Ÿง  Deep Insight

Web-grounded analysis with 35 cited sources.

๐Ÿ”‘ Enhanced Key Takeaways

  • โ€ขAutomakers are pursuing in-house chip development to achieve significant cost reductions, with examples like BYD's Xuanji A3 being roughly one-third the hardware cost of Nvidia's Thor-based solutions, and Nio's Shenji NX9031 offering 10,000 yuan in cost optimization per vehicle.
  • โ€ขThis strategic shift is driven by the need for deep hardware-software integration to optimize performance and efficiency, as well as to leverage vast amounts of proprietary real-world driving data for rapid algorithm training and iteration.
  • โ€ขThe move also aims to mitigate supply chain disruptions and geopolitical risks, particularly for Chinese automakers facing restrictions on semiconductor exports.
  • โ€ขThe evolution of autonomous driving models towards end-to-end large models and "world models" necessitates specialized chip architectures that off-the-shelf solutions may not fully support.
๐Ÿ“Š Competitor Analysisโ–ธ Show
Automaker/SupplierChip NameProcess NodePeak TOPS (Single/Multi-chip)Key Features/ArchitectureStatus/Availability
BYDXuanji A34nm700 TOPS (single), >2100 TOPS (3-chip)16-core CPU, 273 GB/s bandwidth, 420k DMIPS, lowest power consumption (20% less), ASIL-D safety, underpins God's Eye systemMass production (May 2026)
NIOShenji NX90315nm1028 TOPS (single), >2000 TOPS (dual)50+ billion transistors, 32-core CPU, LPDDR5X, 6.5 Gpixel/s ISP, ASIL-D safety, comparable to 4x Nvidia Orin XIn use in ET9, ES6, EC6 (late 2023/early 2024). Licensing tech to others.
XPengTuring AI chipNot specified (purpose-built)700-750 TOPS (single), 2250 TOPS (3-chip)40-core processor, supports 30B parameters, 2 proprietary neural cores, 20% better utilization, integrated 2 NPU, domain-specific architectureNearing mass production (April 2025), debuted in G7 SUV (June 2025)
Li AutoM100 (Mahe 100)5nm automotive-grade1280 TOPS (single), 2560 TOPS (dual)AI inference chip, data-flow architecture, 3x performance for matrix multiplication, designed for VLA modelExpected deployment in 2026
TeslaFSD Chip (HW3)14nm144 TOPS6 billion transistors, 2x 36 TOPS neural network accelerators, vision-only approachIntroduced April 2019
TeslaFSD Computer 2 (HW4)Not specified (rumored 3nm for next-gen CPU)3-8x HW3 (estimated 432-1152 TOPS)16GB RAM, 256GB storage, upgraded GPS, radar interface, symmetrical dual backup designShipping since Jan 2023
NVIDIADRIVE Orin7nm200 TOPSAmpere architecture, AI acceleration, scalable L2+ to L5Available for 2022 model year
NVIDIADRIVE ThorNot specified700 TOPSHigh-performance automotive chipFacing delays
QualcommSnapdragon Ride EliteNot specifiedNot specified (focus on balanced performance)Custom Oryon CPU, 12x faster Hexagon NPU, sensor fusion, real-time decision-makingSupports ADAS/AD functionalities
QualcommSnapdragon Ride Flex SoCNot specifiedScalable from entry to L4Unified architecture for mixed-criticality workloads (cockpit, ADAS, AD on single chip), cost savingsSampling in 2025

๐Ÿ› ๏ธ Technical Deep Dive

  • BYD Xuanji A3: 4nm process, 16-core CPU, 273 GB/s bandwidth, 420,000 DMIPS of processing performance, meets ASIL-D functional safety rating, and offers 20% lower power consumption per unit of compute compared to similar products.
  • NIO Shenji NX9031: Built on a 5nm process with over 50 billion transistors, features LPDDR5X memory, a 32-core CPU (with a mix of large and small cores), a high-dynamic range processor (ISP) with a pixel processing speed of 6.5 Gpixel/s, and supports ASIL-D safety.
  • XPeng Turing AI chip: Features a 40-core processor, supports models with up to 30 billion parameters, is built around two proprietary neural cores, integrates two Neural Processing Units (NPUs), and utilizes a domain-specific architecture for neural networks, along with two independent image ISPs.
  • Li Auto M100 (Mahe 100): Uses a 5nm automotive-grade process and adopts a data-flow architecture, which is data-driven with direct data transmission between computing units to reduce data transfer loss, and is optimized for Visual-Language-Action (VLA) models.
  • Tesla FSD Chip (HW3): Manufactured using 14nm technology, contains 6 billion transistors, and comprises two independent systems, each with a processor featuring 12 A72 cores, a GPU, and a Neural Network processor, with two neural network accelerators per chip, each capable of 36 TOPS.
  • Tesla FSD Computer 2 (HW4): Features 16 GB of RAM and 256 GB of storage, an upgraded triple-band GPS antenna module (adding the L5 frequency), a millimeter wave radar interface, and a symmetrical motherboard design with dual backup.

๐Ÿ”ฎ Future ImplicationsAI analysis grounded in cited sources

Automakers will increasingly license their in-house developed chips and software to other industry players.
Nio has already begun licensing its Shenji NX9031 chip and related technologies to automotive semiconductor companies and potentially robotics firms, indicating a new revenue stream and broader industry influence.
The competitive landscape for autonomous driving chips will intensify, leading to further vertical integration and consolidation among automotive and tech companies.
The push by major automakers to develop proprietary silicon, coupled with their significant R&D investments, will pressure traditional third-party suppliers and may lead to more partnerships or acquisitions to secure advanced capabilities.
Future autonomous driving systems will heavily rely on "world models" and end-to-end AI, requiring chips specifically designed for these complex, data-intensive architectures.
Companies like Nio and XPeng are explicitly designing their chips (e.g., Shenji NX9031 with Nio's World Model, Turing chip for E2E large models) to support these advanced AI paradigms, indicating a shift from traditional rule-based or modular approaches.

โณ Timeline

2014-2016
Tesla's Autopilot HW1.0 uses Mobileye EyeQ3 chip, marking early reliance on third-party solutions.
2017
Tesla begins developing its own main control chip, signaling a shift towards in-house silicon.
2019-04
Tesla introduces its custom-designed FSD Chip (HW3) in Autopilot HW3.0, becoming an early pioneer in proprietary autonomous driving silicon.
2020-H2
Nio forms its in-house chip development team, initiating its journey into proprietary autonomous driving hardware.
2023-12
Nio unveils its self-developed Shenji NX9031 autonomous driving chip, built on a 5nm process.
2026-05
BYD unveils its Xuanji A3, a 4nm intelligent-driving chip, which enters mass production and is described as China's first automotive-grade processor on this advanced node.
๐Ÿ“ฐ

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