Xiaomi Builds Its Own 3nm Driving Chip

💡Xiaomi is spending $3.1B to replace Nvidia with its own 3nm automotive AI chip.
⚡ 30-Second TL;DR
What Changed
Xring D100 is Xiaomi’s in-house 3nm intelligent-driving chip.
Why It Matters
Xiaomi’s vertical integration could reduce reliance on Nvidia and improve its ability to optimize driving models for its own vehicles. It also increases competition in automotive AI silicon, potentially putting pressure on established chip suppliers.
What To Do Next
Benchmark your automotive perception and planning workloads against available Nvidia platforms while monitoring Xiaomi’s Xring D100 software and SDK support.
Key Points
- •Xring D100 is Xiaomi’s in-house 3nm intelligent-driving chip.
- •Xiaomi plans to replace Nvidia hardware in its cars starting in 2027.
- •The company has invested more than 21 billion yuan, or about $3.1 billion, in its chip program.
- •The move gives Xiaomi greater control over automotive AI compute and hardware integration.
🧠 Deep Insight
Background and context from public sources — not the original article. 12 sources cited.
🔑 Enhanced Key Takeaways
- •The Xring D100 is part of a broader semiconductor portfolio that includes the Xring O3 smartphone SoC and the Xring O100 AI accelerator.
- •Xiaomi utilizes TSMC’s 3nm process node for the manufacturing of the D100 chip.
- •The company has scaled its internal semiconductor design division to a workforce of approximately 3,000 employees.
- •The D100 architecture supports the local execution of large language models with up to 200 billion parameters.
- •Xiaomi’s move mirrors a wider industry trend among Chinese automakers like BYD, Nio, and Xpeng to vertically integrate silicon production to secure supply chain autonomy.
📊 Competitor Analysis▸ Show
| Feature | Xiaomi Xring D100 | Nvidia Orin/Thor | Tesla FSD Chip |
|---|---|---|---|
| Process Node | 3nm | 5nm/4nm | 7nm |
| AI Capacity | 200B parameter LLM support | High (Thor: 2000 TFLOPS) | Moderate |
| Strategy | Vertical Integration | Third-party Supplier | Vertical Integration |
🛠️ Technical Deep Dive
- Architecture: 20-core CPU and 16-core NPU configuration.
- Memory: Supports up to 160GB of unified memory.
- AI Capability: Optimized for local inference of 200-billion-parameter AI models.
- Manufacturing: Fabricated using TSMC 3nm process technology.
🔮 Future ImplicationsAI analysis grounded in cited sources
⏳ Timeline
📎 Sources (12)
Factual claims are grounded in the sources below. Forward-looking analysis is AI-generated interpretation.
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Original source: The Next Web (TNW) ↗
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