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Chinese AI Chips Struggle With Coding Inference

Chinese AI Chips Struggle With Coding Inference
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๐Ÿ‡ญ๐Ÿ‡ฐRead original on SCMP Technology

๐Ÿ’กCoding inference is exposing where domestic chips still lagโ€”and how teams are adapting around scarce Nvidia capacity.

โšก 30-Second TL;DR

What Changed

Inference workloads can be adapted to domestic Chinese AI hardware more readily than model training.

Why It Matters

The gap in coding-oriented inference could increase infrastructure costs and engineering complexity for Chinese AI companies. It also highlights how export restrictions affect not only training capacity, but the operational performance of deployed AI services.

What To Do Next

Benchmark your coding-inference workload on the domestic accelerator SDK and CUDA, then route latency-sensitive requests to the faster backend.

Who should care:Enterprise & Security Teams

Key Points

  • โ€ขInference workloads can be adapted to domestic Chinese AI hardware more readily than model training.
  • โ€ขComplex coding tasks still require access to a limited pool of high-end Nvidia processors.
  • โ€ขChinese AI firms are optimising software to stretch available compute capacity amid restricted Nvidia access.

๐Ÿง  Deep Insight

Background and context from public sources โ€” not the original article. 24 sources cited.

๐Ÿ”‘ Enhanced Key Takeaways

  • โ€ขHuawei's Ascend 910C, built on SMIC's 7nm N+2 process, can achieve 60-70% of Nvidia H100's inference performance and is being integrated into "all-in-one machines" with DeepSeek's models to offer significant cost savings.
  • โ€ขSMIC is advancing its manufacturing capabilities, mass-producing 7nm chips and conducting pilot runs for 5nm process technology for partners like Huawei and Alibaba, despite relying on older Deep Ultraviolet (DUV) lithography due to US restrictions on EUV equipment.
  • โ€ขBaidu has developed its Kunlun M100 chip specifically optimized for large-scale AI model inference, with its third generation of Kunlun chips already commercialized and supporting large-scale inference scenarios.
  • โ€ขUS export policy regarding advanced AI chips to China saw a shift in January 2026, moving from a "presumption of denial" to a "case-by-case review" for chips like Nvidia H200, though this has been met with congressional opposition and State Department delays.
  • โ€ขChinese AI companies are employing software optimization techniques such as quantization, pruning, and continuous batching to maximize throughput and efficiency from existing hardware, compensating for limitations in raw compute power.
๐Ÿ“Š Competitor Analysisโ–ธ Show
Feature/MetricHuawei Ascend 910B/910CNvidia H100
Inference PerformanceMatches or outperforms H100 in some long text generation scenarios; 910C delivers 60-70% of H100 FP16 performance (320 TFLOPS FP16).Industry standard, high performance.
Power EfficiencyEngineered for extreme power efficiency, often using less power for the same task in specific workloads.High, but Huawei claims better power efficiency in some specific cases.
CostMuch lower price point, thousands of dollars less per chip; integrated solutions offer 60-70% cost savings compared to H100 solutions.Expensive, tens of thousands of dollars per chip.
ArchitectureDa Vinci architecture, specialized AI design with tight hardware-software co-optimization and vertical integration.General-purpose GPU architecture with a mature CUDA ecosystem.
Manufacturing ProcessSMIC's 7nm (N+2) process.TSMC's advanced nodes.

๐Ÿ› ๏ธ Technical Deep Dive

  • Software Optimization Techniques for Inference:
    • Quantization: Reduces the precision of model weights and activations (e.g., from 32-bit floating point to 8-bit or 4-bit integers), significantly cutting memory and compute requirements and potentially offering 2-4x speedup.
    • Pruning (Sparsity): Involves removing unnecessary parameters, connections, neurons, channels, or attention heads from an AI model to reduce its size and computational load while maintaining performance. Structured pruning is often preferred for standard hardware.
    • Knowledge Distillation: A technique where a smaller, more efficient "student" model is trained to replicate the behavior of a larger, more complex "teacher" model, resulting in a compact model suitable for inference.
    • Batching (Continuous/Dynamic Batching): Optimizes GPU utilization by processing multiple inference requests concurrently, which is particularly effective for Large Language Models (LLMs) that have distinct compute-bound prefill and memory-bound decode phases.
    • Optimized Runtimes and Memory Management: Utilizing specialized inference runtimes (e.g., NVIDIA NIM, vLLM) and advanced GPU memory management techniques like PagedAttention to improve efficiency.
  • Hardware Architecture (Chinese AI Chips):
    • Huawei Ascend (Da Vinci Architecture): Features a specialized AI-focused design with deep integration between hardware and software, enabling vertical optimization for specific AI workloads.
    • Baidu Kunlun: Built on a proprietary architecture, designed to deliver stable, high-performance AI computing at scale and ensure broad compatibility across various AI models.
    • SMIC's Manufacturing Process: SMIC utilizes Deep Ultraviolet (DUV) lithography for producing 7nm and 5nm process nodes, a less advanced technology compared to Extreme Ultraviolet (EUV) lithography, which can lead to lower yield rates (e.g., 20-40% for Ascend 910C) and higher production costs.

๐Ÿ”ฎ Future ImplicationsAI analysis grounded in cited sources

China will achieve greater self-sufficiency in AI inference capabilities.
Continued state-backed investment in domestic chip manufacturing (SMIC) and design (Huawei, Baidu, Alibaba) combined with software optimization efforts will reduce reliance on foreign high-end GPUs for inference.
The global AI chip market will become increasingly bifurcated.
US export controls and China's drive for domestic alternatives will lead to distinct ecosystems, with Chinese firms developing their own hardware and software stacks, potentially influencing other countries facing similar restrictions.
Software optimization will become even more critical for maximizing AI compute.
As hardware advancements face physical and geopolitical limits, sophisticated software techniques like quantization and pruning will be essential to extract maximum performance from available, potentially less powerful, chips for complex AI workloads.

โณ Timeline

2018-07
Baidu unveils Kunlun, China's first cloud-to-edge AI chip, including the inference chip "818-100".
2022-10
The US implements sweeping export controls targeting China's access to advanced computing and semiconductor manufacturing items.
2023-08
Huawei launches the Mate 60 smartphone powered by the Kirin 9000s chip, manufactured by SMIC using its 7nm process.
2024-05
China launches its third national semiconductor fund, valued at 344 billion yuan ($47.5 billion), with SMIC as a primary beneficiary.
2025-04
Huawei's Ascend 910C, built on SMIC's N+2 process, is reported to deliver 60-70% of Nvidia H100's FP16 performance for inference.
2026-01
The US Department of Commerce shifts its export license review policy for Nvidia H200 and AMD MI325X chips to China from "presumption of denial" to "case-by-case review."
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