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AI Boom Rockets Storage Prices 300%

AI Boom Rockets Storage Prices 300%
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💡AI storage costs 4x up, 50% HBM shortage—China tech closing gap fast.

⚡ 30-Second TL;DR

What Changed

Prices up 300%+; 12GB+256GB combo from $30 to $130

Why It Matters

Escalating costs hit Chinese phone/PC makers, halting low-end production. Accelerates domestic storage push, potentially lowering long-term AI hardware expenses.

What To Do Next

Benchmark YMTC NAND and CXMT DRAM for AI inference servers to hedge price hikes.

Who should care:Enterprise & Security Teams

Key Points

  • Prices up 300%+; 12GB+256GB combo from $30 to $130
  • HBM market hits $54B with 50-60% capacity gap
  • Chinese firms trail pricing; follow global giants
  • Yangtze 232-layer 3D NAND yield 95%, 20% lower cost/bit
  • CXMT 19nm DDR5 at 8000Mbps, yield over 95%

🧠 Deep Insight

Background and context from public sources — not the original article. 6 sources cited.

🔑 Enhanced Key Takeaways

  • YMTC's Xtacking4.x architecture achieved first commercial availability in 2025 with 1Tb 3D TLC NAND chips, demonstrating hybrid bonding expertise that positions the company for HBM integration beyond traditional NAND production[2][3]
  • CXMT's DRAM production capacity expanded 70% in Q3 2025 to 720,000 wafers (2.73M annually), while simultaneously pursuing HBM3 certification by end-2025, indicating dual-track strategy to address both commodity DRAM shortages and premium AI memory demand[1]
  • Chinese memory makers are establishing local HBM packaging ecosystems with Wuhan Xinxin and Tongfu Microelectronics, reducing reliance on Korean advanced packaging and potentially enabling cost advantages in AI accelerator supply chains by 2027[4]
  • YMTC's new Wuhan Phase 3 fab (launching ~2027) will dedicate 50% capacity to DRAM production despite being historically a NAND specialist, signaling structural shift toward integrated memory solutions for AI infrastructure[5]
  • CXMT trails Samsung/SK Hynix by 3 years in process technology but demonstrated working DDR5 designs and HBM2 samples to domestic AI customers including Huawei, suggesting capability gaps are narrowing faster than historical trends[2][5]
📊 Competitor Analysis▸ Show
MetricYMTCCXMTSamsungSK Hynix
3D NAND Layers (Mass Prod.)270 layers286 layers321 layers
NAND Performance (Gb/mm²)20.47HigherHigher
DRAM Process GapEntering market3 years behindLeading edgeLeading edge
HBM StatusXtacking4.x integration readyHBM3 certification targeted end-2025HBM3 shippingHBM3 shipping
Q3 2025 DRAM CapacityTransitioning to DRAM720,000 wafersHigher volumeHigher volume
New Fab TimelineWuhan Phase 3 (~2027)Shanghai facility (~2027)Ongoing expansionOngoing expansion

🛠️ Technical Deep Dive

  • YMTC Xtacking4.x Architecture: Wafer-to-wafer bonding technology enabling 1Tb 3D TLC NAND with improved heat management and stack heights suitable for HBM applications; first commercial deployment in ZhiTai SSD TiPro9000[2][3]
  • CXMT G4 DDR5 DRAM: Advanced node technology achieving DDR5-6000 speeds with reported yields exceeding 95%; first commercial shipment detected in Gloway 16GB×2 UDIMM modules[2][3]
  • YMTC NAND Yield Metrics: 270-layer 3D NAND achieving 95% yield with 20% lower cost-per-bit versus competitors, indicating manufacturing maturity despite layer count trailing SK Hynix's 321-layer standard[1]
  • CXMT HBM Development Path: Progressing from HBM2 samples toward HBM3 production (2026-2027 timeline); integrating with local packaging partners (Wuhan Xinxin, Tongfu Microelectronics) to develop complete HBM stacks for AI accelerators[4][5]
  • Production Scaling: YMTC Wuhan Phase 2 NAND output doubled from 60,000 to 130,000 wafers in Q2 2025; total NAND production increased 42% year-over-year, demonstrating rapid capacity ramp[1]

🔮 Future ImplicationsAI analysis grounded in cited sources

Chinese HBM supply will reach 30-40% of global capacity by 2028 if CXMT and YMTC achieve planned 2027 fab volumes and packaging integration succeeds
CXMT's Shanghai fab (2-3× Hefei size) plus YMTC's 50% DRAM-dedicated Wuhan Phase 3 capacity, combined with maturing local packaging, could supply domestic AI accelerator demand and reduce Korean supplier dependency[5]
YMTC will transition from pure-play NAND to integrated memory solutions provider by 2027
Xtacking4.x hybrid bonding expertise, planned DRAM production, and HBM integration partnerships position YMTC to compete in high-margin AI memory stacks rather than commodity NAND[4][5]
CXMT's process technology gap versus Samsung/SK Hynix will narrow to 2 years by 2027 despite equipment sanctions
Consistent DDR5 and HBM3 progress despite material/equipment constraints, combined with new Shanghai fab infrastructure, suggests accelerating capability development trajectory[2][5]

Timeline

2024-Q4
YMTC Xtacking4.x 1Tb 3D TLC NAND first commercial availability in ZhiTai SSD TiPro9000
2025-01
CXMT G4 DDR5 DRAM first market detection in Gloway 16GB×2 UDIMM modules
2025-Q2
YMTC Wuhan Phase 2 NAND production doubled to 130,000 wafers; total NAND output increased 42% YoY
2025-Q3
CXMT DRAM capacity expanded 70% to 720,000 wafers; annual production projected at 2.73M wafers
2025-Q4
CXMT targets HBM3 mass production certification completion
2027-Q1
CXMT Shanghai DRAM fab and YMTC Wuhan Phase 3 fab planned volume production launch
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