Tag: #moe-models14 results
On x570 boards with asymmetrical x16/x4 PCI-E lanes, default CUDA0 uses the slow x4 slot, bottlenecking prompt processing in llama.cpp. Setting export CUDA_VISIBLE_DEVICES="1,0" prioritizes the x16 GPU, doubling speed from 70 to 140 t/s for MoE models. Verify lanes with nvtop or lspci before applying.
Visual chart of latest open models Nov 2025-Apr 2026 by size tiers up to 1T params. Features Qwen3.6 27B released today among 50+ entries. Notes best period for local LLMs; user runs 30-35B MoE on 8GB VRAM.
An experimental pull request in llama.cpp introduces weight prefetching during CPU offloading. It boosts performance for dense models and smaller MoE models. Ideal for users with ample RAM but limited GPU.
Performance comparison of Qwen3 and Qwen3.5 models shared on Reddit. Dense models use listed parameter sizes; MoE models scaled via sqrt(total × active) for compute equivalence. Data sourced from artificialanalysis.ai leaderboards.