NIO Shenji M97 Chip Tapes Out 700+ TOPS
💡NIO's 700TOPS auto chip partners target Leapmotor/Geely, eroding Nvidia EV share
⚡ 30-Second TL;DR
What Changed
NIO NX9031 spin-off to Shenji Tech yields billions in licensing fees
Why It Matters
Accelerates国产 high-TOPS ADAS chips adoption in China EVs, challenging Nvidia/Qualcomm dominance amid price wars. Boosts NIO revenue diversification beyond vehicles.
What To Do Next
Benchmark Shenji M97 against Horizon J6P for your ADAS inference stack pricing.
🧠 Deep Insight
Web-grounded analysis with 9 cited sources.
🔑 Enhanced Key Takeaways
- •Shenji NX9031 has achieved mass production scale with over 150,000 units shipped since 2024, making it the first Chinese 5nm automotive-grade chip in large-scale commercial deployment[5][7]
- •The M97 chip's 700+ TOPS performance directly targets Horizon Robotics' J6P (560 TOPS) and represents NIO's strategy to monetize R&D through external licensing to competitors like Leapmotor and Geely[2][3][6]
- •Shenji's memory bandwidth of 546 GB/s via LPDDR5X interface exceeds NVIDIA's Thor-U by approximately 2x and matches Thor-X, establishing a technical advantage in data throughput for autonomous driving workloads[1][5]
- •The joint venture structure with Axera Semiconductor and OmniVision enables NIO to separate chip commercialization from vehicle manufacturing, with Shenji securing 2.25 billion yuan in fresh financing to fund next-generation chip development[3][8]
📊 Competitor Analysis▸ Show
| Feature | NIO Shenji M97 | Horizon J6P | NIO Shenji 9031e | Horizon J6M |
|---|---|---|---|---|
| Computing Power | 700+ TOPS | 560 TOPS | ~128 TOPS (planned) | 128 TOPS |
| Target Segment | Mid-to-premium ADAS | Mid-range ADAS | Budget ADAS | Budget ADAS |
| Memory Bandwidth | 546 GB/s (NX9031) | Not disclosed | Not disclosed | Not disclosed |
| Manufacturing Process | 5nm automotive-grade | Not disclosed | Not disclosed | Not disclosed |
| Deployment Status | Q3 2026 target | In-market | Development | In-market |
🛠️ Technical Deep Dive
• Architecture: Heterogeneous multi-core resource pool with self-developed Image Signal Processor (ISP) and Neural Network Processing Unit (NPU) optimized for concurrent multi-task processing[5] • Memory Interface: 512-bit LPDDR5X interface delivering 546 GB/s bandwidth, supporting 32-bit non-MoE models within 30ms latency (excluding inference optimizations)[1] • Algorithm Efficiency: BEV (bird's-eye view) processing with ultra-high pixel density achieves 3x efficiency compared to general-purpose chips due to heterogeneous architecture[5] • Manufacturing: 5nm automotive-grade process node, first Chinese company to achieve both development and large-scale commercial production at this node[7] • Redundancy: ET9 equipped with dual NX9031 chips enabling millisecond-level hot redundancy with combined 2,000 TOPS sparse computing power[1]
🔮 Future ImplicationsAI analysis grounded in cited sources
⏳ Timeline
📎 Sources (9)
Factual claims are grounded in the sources below. Forward-looking analysis is AI-generated interpretation.
- chinaevhome.com — The Computing Power Race of Nio Xpeng and Li Auto
- chinaevhome.com — Nio Chip Unit Engages Leapmotor Geely After M97 Tape Out
- cnevpost.com — Nio Chip Unit Approaches Leapmotor Geely for Potential Supply Deals
- eletric-vehicles.com — Nios Chip Unit Targets Leapmotor and Geely with Cheaper Alternative to Nvidia
- eu.36kr.com — 3716917020112263
- carnewschina.com — Nio in Talks to Supply Self Developed Chips to Geely and Leapmotor Report Says
- autonews.gasgoo.com — Nios Chip Subsidiary Signs Definitive Agreements for Over 22 Billion Yuan Investment 2026992357856014337
- just-auto.com — Nio Chip Unit Secure 2 25bn Yuan
- youtube.com — Watch
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Original source: 36氪 ↗