MiniMax-M2.7 NVFP4 Hits 2800 tok/s on 2x RTX PRO 6000

💡Blackwell 96GB benchmarks: 2800 t/s peak on MiniMax-M2.7 NVFP4
⚡ 30-Second TL;DR
What Changed
Decode: 2800 tok/s agg at C=128 (21.9 per-req), 127.7 at C=1
Why It Matters
Sets bar for Blackwell inference throughput; valuable for high-concurrency local serving on pro GPUs.
What To Do Next
Replicate benchmarks on your 2x RTX PRO 6000 using github.com/Visual-Synthesizer/rtx6kpro repo.
Key Points
- •Decode: 2800 tok/s agg at C=128 (21.9 per-req), 127.7 at C=1
- •Prefill C=1: 17,286 tok/s at 8k ctx, drops to 9,908 at 128k
- •Hardware: 2x RTX PRO 6000 Blackwell, SGLang cu130, modelopt_fp4
- •KV pool ~83k tokens; long ctx limited at high concurrency
🧠 Deep Insight
AI-generated analysis for this event — not the original article.
🔑 Enhanced Key Takeaways
- •The MiniMax-M2.7 model utilizes a specialized FP4 quantization format (NVFP4) optimized specifically for NVIDIA's Blackwell architecture, leveraging hardware-native tensor core acceleration for sub-8-bit precision.
- •The SGLang implementation for this benchmark utilizes a custom kernel integration that bypasses standard PyTorch overhead, specifically targeting the memory bandwidth bottlenecks inherent in multi-GPU tensor-parallel (TP) inference.
- •The RTX 6000 Blackwell (96GB) configuration provides a unique high-memory-bandwidth density, allowing the model to fit entirely within VRAM even at high context lengths, which is the primary driver for the observed 2800 tok/s throughput.
📊 Competitor Analysis▸ Show
| Feature | MiniMax-M2.7 (NVFP4) | Llama 3.1 8B (FP8) | Qwen2.5 7B (INT4) |
|---|---|---|---|
| Architecture | Blackwell-Optimized | Standard Transformer | Standard Transformer |
| Quantization | NVFP4 (Hardware Native) | FP8 (Software/Hybrid) | INT4 (GPTQ/AWQ) |
| Throughput (Est) | ~2800 tok/s (2x GPU) | ~1200 tok/s (2x GPU) | ~1500 tok/s (2x GPU) |
| Context Efficiency | High (Native KV Cache) | Moderate | Moderate |
🛠️ Technical Deep Dive
- NVFP4 Quantization: Utilizes NVIDIA's Blackwell-specific FP4 data format, which provides 2x the throughput of FP8 by reducing memory footprint and increasing compute density per clock cycle.
- SGLang Integration: Employs a specialized backend that optimizes the KV cache layout for Blackwell's memory controller, minimizing latency during high-concurrency (C=128) scenarios.
- Tensor Parallelism (TP=2): Implements a ring-based communication pattern optimized for NVLink, reducing the latency penalty typically associated with splitting model weights across two physical GPUs.
- KV Cache Management: Uses a paged attention mechanism tuned for the 96GB VRAM capacity of the RTX 6000, allowing for a larger active token pool compared to previous-generation Ampere/Ada Lovelace cards.
🔮 Future ImplicationsAI analysis grounded in cited sources
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Original source: Reddit r/LocalLLaMA ↗
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