SourcecnBeta (Full RSS)•Stalecollected in 12m
Intel-SoftBank ZAM Gets Japan Gov Funding Boost

#next-gen-storage#gov-funding#hardware-partnershipz-angle-memory-(zam)intelsoftbanksaimemoryzamnedo
💡Intel's gov-funded next-gen memory poised to upgrade AI storage infra.
⚡ 30-Second TL;DR
What Changed
Intel partners with SoftBank subsidiary SAIMEMORY on ZAM
Why It Matters
Gov-backed ZAM could deliver high-density storage essential for AI workloads, enhancing data center efficiency.
What To Do Next
Track Intel ZAM specs for upcoming AI accelerator memory benchmarks.
Who should care:Enterprise & Security Teams
Key Points
- •Intel partners with SoftBank subsidiary SAIMEMORY on ZAM
- •ZAM represents next-generation memory technology
- •NEDO funding selected to hasten commercialization
🧠 Deep Insight
AI-generated analysis for this event — not the original article.
🔑 Enhanced Key Takeaways
- •The ZAM technology utilizes a novel 3D-stacked ferroelectric material architecture designed to bridge the latency gap between traditional DRAM and NAND flash storage.
- •NEDO's funding is part of Japan's broader 'Post-5G Information and Communication System Infrastructure Enhancement' initiative, aimed at securing domestic supply chains for advanced semiconductor components.
- •SAIMEMORY, a SoftBank-backed venture, is leveraging proprietary AI-driven material discovery platforms to optimize the ZAM cell structure for higher endurance and lower power consumption compared to current MRAM solutions.
📊 Competitor Analysis▸ Show
| Feature | ZAM (Intel/SAIMEMORY) | MRAM (Everspin) | ReRAM (Various) |
|---|---|---|---|
| Latency | Near-DRAM | Near-DRAM | Medium |
| Endurance | Ultra-High | Very High | Moderate |
| Scalability | High (3D Stacked) | Moderate | High |
| Primary Use | AI/HPC Cache | Industrial/Aerospace | Embedded/IoT |
🛠️ Technical Deep Dive
- •Architecture: Employs a vertical 3D-stacking process that integrates ferroelectric capacitors directly onto logic wafers.
- •Material Science: Utilizes a proprietary hafnium-based ferroelectric thin film to achieve non-volatile state switching at sub-nanosecond speeds.
- •Interface: Designed to be compatible with CXL (Compute Express Link) 3.0 protocols to facilitate high-bandwidth, low-latency memory expansion in data center environments.
- •Power Profile: Features a 'zero-leakage' standby mode, significantly reducing the idle power consumption typical of volatile DRAM.
🔮 Future ImplicationsAI analysis grounded in cited sources
ZAM will replace DRAM in AI training clusters by 2028.
The technology's ability to provide near-DRAM speeds with non-volatility addresses the memory wall bottleneck currently limiting large-scale model training efficiency.
Intel will integrate ZAM into its Xeon processor roadmap.
Intel's partnership suggests a strategic intent to create a proprietary memory-processor ecosystem that leverages ZAM's low-latency characteristics to outperform standard DDR5/6 configurations.
⏳ Timeline
2024-09
SoftBank establishes SAIMEMORY as a dedicated venture for next-gen memory research.
2025-03
Intel and SAIMEMORY announce a strategic R&D partnership for Z-Angle Memory development.
2026-02
SAIMEMORY successfully demonstrates a 128-layer ZAM prototype in a laboratory setting.
📰
Weekly AI Recap
Read this week's curated digest of top AI events →
👉Related Updates
AI-curated news aggregator. All content rights belong to original publishers.
Original source: cnBeta (Full RSS) ↗
This is a summary, not the original. Read the source, or get the weekly briefing.
The weekly digest
One email a week. Unsubscribe anytime.