IMEC unveils 325GHz chip platform for 6G

🔑 Enhanced Key Takeaways

•The platform integrates high-density metal-insulator-metal (MIM) capacitors using a high-k aluminum-hafnium-oxide dielectric and a three-dimensional oxide-stud architecture, achieving a 10- to 100-fold increase in capacitance density compared to typical on-chip capacitors in III-V processes.
•It enables heterogeneous integration of performance-critical III-V chiplets (such as InP, GaAs, and GaN) with cost-effective Si-CMOS technology on a single 300mm silicon interposer, allowing III-V dies to focus on active functions while the interposer handles passive components and interconnects.
•IMEC has developed a scalable passive modeling framework for RF passives on the interposer, validated up to approximately 300 GHz, which allows designers to predict circuit performance based on geometry and layout, thereby shortening design cycles.
•The platform incorporates laser-assisted bonding for III-V chiplet assembly, achieving high alignment accuracy (below 600nm) and minimal rotational misalignment (below 0.05°) without compromising the thermal integrity of sensitive interposer layers.
•The technology demonstrates a record-low insertion loss of 0.73dB/mm at frequencies up to 325GHz, which is crucial for unlocking the potential of mmWave and sub-THz frequency bands for 6G and other high-speed applications.

🛠️ Technical Deep Dive

Interposer Wafer Size: 300 mm RF silicon interposer platform.
Integrated Passive Components: High-density metal–insulator–metal (MIM) capacitors.
MIM Dielectric Material: High-k aluminum–hafnium–oxide.
MIM Structure: Three-dimensional oxide-stud Back-End-of-Line (BEOL) architecture.
Capacitance Density: 10–100x increase compared to typical on-chip capacitors in III-V processes.
Heterogeneous Integration: Supports III-V chiplets (InP, GaAs, GaN) on Si-CMOS.
RF/Microwave Interconnects: 5µm line width and 5µm spacing.
High-Density Digital Interconnects: 1µm line width and 1µm spacing.
Flip-Chip Pitch: 40µm, with ongoing efforts to scale down to 20µm.
Insertion Loss: Record-low 0.73dB/mm at frequencies up to 325GHz.
Bonding Technique: Laser-assisted bonding for III-V chiplet assembly, achieving alignment accuracy below 600nm and rotational misalignment below 0.05°.
Passive Modeling Framework: Validated up to approximately 300 GHz, enabling parametric models for transmission lines, inductors, and MIM capacitors.

🔮 Future ImplicationsAI analysis grounded in cited sources

The platform will significantly accelerate the commercialization of 6G hardware.

By enabling cost-effective heterogeneous integration of high-performance III-V materials with scalable silicon CMOS and reducing signal loss, it addresses key manufacturing and performance bottlenecks for sub-THz frequencies.

This technology will be crucial for ultra-high-speed data centers and advanced sensing applications.

The low-loss, high-frequency capabilities and heterogeneous integration are essential for next-generation mmWave and sub-THz wireless front-ends, as well as RF-grade signal handling in data center links and high-resolution automotive radar.

The chiplet-based approach will become a standard for future high-frequency communication systems.

The platform's ability to seamlessly integrate diverse materials optimized for different physical properties onto a single 300mm silicon platform provides a vital blueprint for the next era of infrastructure.

⏳ Timeline

2021

IMEC reported a 140 GHz T/R Front-End Module in 22 nm FD-SOI CMOS.

2022-03

IMEC discussed the necessity of early hardware innovation for 6G, including a shift to higher frequencies.

2024

IMEC demonstrated seamless InP chiplet integration on a 300mm RF silicon interposer with negligible insertion loss at 140GHz.

2025-05

IMEC announced a new milestone at ECTC 2025, demonstrating a record-low insertion loss of 0.73dB/mm at frequencies up to 325GHz using the same Si interposer platform.

2025-06

IMEC and Ghent University published a fully-integrated, single-chip microwave photonics system for compact and versatile high-frequency signal processing.

2026-06

IMEC expanded its 300mm RF silicon interposer platform with high-density MIMCAPs, a scalable passive modeling framework, and laser-assisted chiplet bonding.