DeepSeek and Zhipu AI Pivot to Custom Silicon
💡Major AI labs are moving to custom silicon; learn how vertical integration is reshaping the AI infrastructure landscape.
⚡ 30-Second TL;DR
What Changed
DeepSeek and Zhipu AI are developing in-house silicon to reduce dependency on external GPU suppliers.
Why It Matters
This trend signals a structural shift where AI labs become vertically integrated hardware companies to secure supply chain independence and cost efficiency.
What To Do Next
Monitor the hardware requirements of your current inference stack to identify if your workload could benefit from specialized hardware acceleration in the future.
Key Points
- •DeepSeek and Zhipu AI are developing in-house silicon to reduce dependency on external GPU suppliers.
- •The move mirrors strategies adopted by OpenAI and Anthropic to control the full AI stack.
- •Custom chips are expected to significantly lower long-term inference costs and improve latency for large-scale models.
🧠 Deep Insight
AI-generated analysis for this event — not the original article.
🔑 Enhanced Key Takeaways
- •DeepSeek's silicon initiative is reportedly focused on 'domain-specific architecture' (DSA) designed specifically to accelerate Mixture-of-Experts (MoE) inference, which is central to their model efficiency strategy.
- •Zhipu AI has established a dedicated hardware subsidiary, often referred to in industry circles as 'Zhipu Core,' to handle the integration of chip design with their GLM (General Language Model) series.
- •The pivot is heavily influenced by the tightening of U.S. export controls on advanced AI chips, forcing Chinese labs to seek domestic alternatives to NVIDIA's H20 and Blackwell-series GPUs.
- •Both companies are leveraging RISC-V open-source architecture for their custom chip designs to bypass potential intellectual property restrictions and maintain long-term design flexibility.
- •Industry analysts note that these labs are collaborating with domestic Chinese foundries, such as SMIC, to ensure a localized supply chain for chip manufacturing, despite yield challenges at advanced nodes.
📊 Competitor Analysis▸ Show
| Feature | DeepSeek/Zhipu (Custom) | OpenAI (Project Orion/Custom) | Google (TPU v5p) | NVIDIA (H200/B200) |
|---|---|---|---|---|
| Primary Focus | MoE Inference Optimization | Full-Stack Integration | Cloud/TPU Ecosystem | General Purpose AI |
| Architecture | RISC-V / DSA | Proprietary / ASIC | Custom ASIC (TPU) | GPU (CUDA) |
| Supply Chain | Domestic (SMIC) | TSMC | TSMC | TSMC |
🛠️ Technical Deep Dive
- Focus on high-bandwidth memory (HBM) integration to resolve memory wall bottlenecks during large-scale MoE model inference.
- Implementation of custom interconnect protocols to replace NVLink, aiming to scale multi-chip clusters without relying on restricted Western technologies.
- Optimization of sparse computation kernels directly into the silicon logic to reduce the overhead of routing tokens in MoE architectures.
- Utilization of chiplet-based design strategies to improve yield rates when manufacturing at mature process nodes (e.g., 7nm or 14nm) instead of relying solely on leading-edge EUV lithography.
🔮 Future ImplicationsAI analysis grounded in cited sources
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Original source: Pandaily ↗
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