黃仁勳宴請SK海力士HBM4工程師慶生

🔑 增強重點摘要

• •SK Hynix secured 70% of NVIDIA's HBM4 orders for the Vera Rubin platform, utilizing 12-layer and 16-layer stacks.[1]
• •HBM4 features a 2048-bit I/O interface doubling HBM3E's bandwidth, custom logic die via TSMC 12nm/5nm processes, and 30-micrometer thinned dies for 16-high stacks.[1]
• •SK Hynix began HBM development in 2009, co-developed first TSV HBM with AMD in 2014, and released HBM3 in 2021 with mass production in 2022.[3][4]

🛠️ 技術深入

• •HBM4 doubles bus width to 2048-bit I/O from HBM3E's 1024-bit, enabling >2.0 TB/s per stack at lower clocks for improved power efficiency.[1]
• •Replaces DRAM base die with TSMC 12nm/5nm logic die integrating memory controllers and PHY, reducing latency by ~20%.[1]
• •16-high stacks achieved by thinning DRAM dies to 30 micrometers while maintaining 775-micrometer height limit.[1]
• •Power usage 40% more efficient than prior gen, >10 Gbps speed, capable of processing over 400 Full HD 5GB movies per second per stack.[3]

🔮 前景展望AI analysis grounded in cited sources

⏳ 時間線